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Dead-time is specified individually for the rising and falling edge of the original PWM. These values
are shared across all the three PWM channels of the DTI unit. A single prescaler value is provided
for the DTI unit, meaning that both the rising and falling edge dead-times share prescaler value. The
prescaler divides the HFPERCLK TIMERn by a configurable factor between 1 and 1024, which is set in the
DTPRESC field in TIMER0_DTTIME. The rising and falling edge dead-times are configured in DTRISET
and DTFALLT in TIMER0_DTTIME to any number between 1-64 HFPERCLK TIMER0 cycles.
19.3.3.1 Output Polarity
The value of the primary and complementary outputs in a pair will never be set active at the same time by
the DTI unit. The polarity of the outputs can be changed however, if this is required by the application. The
active values of the primary and complementary outputs are set by two the TIMER0_DTCTRL register.
The DTIPOL bit of this register specifies the base polarity. If DTIPOL =0, then the outputs are active-high,
and if DTIPOL = 1 they are active-low. The relative phase of the primary and complementary outputs is
not changed by DTIPOL, as the polarity of both outputs is changed, see Figure 19.24 (p. 257)
In some applications, it may be required that the primary outputs are active-high, while the
complementary outputs are active-low. This can be accomplished by manipulating the DTCINV bit of
the TIMER0_DTCTRL register, which inverts the polarity of the complementary outputs relative to the
primary outputs.
Example 19.1. TIMER DTI Example 1
DTIPOL = 0 and DTCINV = 0 results in outputs with opposite phase and active-high states.
Example 19.2. TIMER DTI Example 2
DTIPOL = 1 and DTCINV = 1 results in outputs with equal phase. The primary output will be active-high,
while the complementary will be active-low
Figure 19.24. TIMER Output Polarities
Original PWM
DTIPOL = 0
TIM0_CC0
DTCINV = 0
TIM0_CDTI0
DTIPOL = 1
TIM0_CC0
DTCINV = 0
TIM0_CDTI0
DTIPOL = 0
TIM0_CC0
DTCINV = 1
TIM0_CDTI0
DTIPOL = 1
TIM0_CC0
DTCINV = 1
TIM0_CDTI0
Output generation on the individual DTI outputs can be disabled by configuring TIMER0_DTOGEN.
When output generation on an output is disabled, it will go to and stay in its inactive state.
2011-04-12 - d0001_Rev1.10
257
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